High Speed Digital Design and SimulationThis High Speed Digital Design Seminar delivers new features and capabilities of Keysight’s PathWave Advanced Design System (ADS) 2023. In this seminar, the following topics were discussed.

  • Hear how to accelerate your design process using Memory Designer pre-layout and post-layout workflows. 
  • Learn how the new Command Address (CA) / Data Bus Pre-Layout Builder is a versatile tool that can reduce your design time for complicated memory buses.
  • Discuss new technologies for serializer / deserializer (SerDes) channel and transient simulations. Topics cover the PCIe® AMI Modeler with PCIe Gen5 reference channels, the USB AMI Modeler, and channel simulator support for PAM3, PAM8, and PAM16 signaling.
  • Examine the latest addition to the power integrity workflow — a dedicated conducted electromagnetic interference (EMI) analysis method that simplifies a complex task.
  • Get an overview of simulation speed-up possibilities with high-performance computing – on-premise or in the cloud. 

Download the High-Speed Digital Design Seminar Slides 

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