!!!! 6 0 1 990113630 Vc174 ! Device : 2764 ! Function : uv_prom 3-state 8k x 8 ! revision : B.01.00 ! safeguard : med_out_mos ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." sequential warning "Pull-ups are required to test high-impedance outputs." vector cycle 600n receive delay 500n assign VCC to pins 28 assign GND to pins 14 assign VPP to pins 1 assign Address to pins 2,23,21,24,25,3,4,5 assign Address to pins 6,7,8,9,10 assign Data to pins 19,18,17,16,15,13,12,11 assign Data_D0 to pins 11 !AT Added for minimum pin test. assign Data_D1 to pins 12 !AT Added for minimum pin test. assign Data_D2 to pins 13 !AT Added for minimum pin test. assign Data_D3 to pins 15 !AT Added for minimum pin test. assign Data_D4 to pins 16 !AT Added for minimum pin test. assign Data_D5 to pins 17 !AT Added for minimum pin test. assign Data_D6 to pins 18 !AT Added for minimum pin test. assign Data_D7 to pins 19 !AT Added for minimum pin test. assign Output_Enable to pins 22 assign Chip_Enable to pins 20 assign Program to pins 27 assign Not_connected to pins 26 family TTL power VCC, GND inputs Address, Output_Enable, Chip_Enable, Program outputs Data outputs Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for minimum pin test. outputs Data_D4, Data_D5, Data_D6, Data_D7 !AT Added for minimum pin test. nondigital VPP, Not_connected when Chip_Enable is "1" inactive Data when Output_Enable is "1" inactive Data trace Data to Address,Output_Enable,Chip_Enable,Program disable Data with Chip_Enable to "1" disable Data with Output_Enable to "1" set load on groups Data to pull up !**************************************************************************** !**************************************************************************** vector Lower_Address_Counter set Chip_Enable to "0" set Output_Enable to "0" set Address to "0000000000000" set Data to "00000000" upcounter Address end vector vector Upper_Address_Counter set Chip_Enable to "0" set Output_Enable to "0" set Address to "1111000000000" set Data to "00000000" upcounter Address end vector !AT The following vectors have been added for a minimum pins test. Any !AT vectors that references the data bus was copied and modified to reference !AT only a single pin of the data bus. vector Address_Counter_D0 set Chip_Enable to "0" set Output_Enable to "0" set Address to "0000000000000" set Data_D0 to "0" upcounter Address end vector vector Address_Counter_D1 set Chip_Enable to "0" set Output_Enable to "0" set Address to "0000000000000" set Data_D1 to "0" upcounter Address end vector vector Address_Counter_D2 set Chip_Enable to "0" set Output_Enable to "0" set Address to "0000000000000" set Data_D2 to "0" upcounter Address end vector vector Address_Counter_D3 set Chip_Enable to "0" set Output_Enable to "0" set Address to "0000000000000" set Data_D3 to "0" upcounter Address end vector vector Address_Counter_D4 set Chip_Enable to "0" set Output_Enable to "0" set Address to "0000000000000" set Data_D4 to "0" upcounter Address end vector vector Address_Counter_D5 set Chip_Enable to "0" set Output_Enable to "0" set Address to "0000000000000" set Data_D5 to "0" upcounter Address end vector vector Address_Counter_D6 set Chip_Enable to "0" set Output_Enable to "0" set Address to "0000000000000" set Data_D6 to "0" upcounter Address end vector vector Address_Counter_D7 set Chip_Enable to "0" set Output_Enable to "0" set Address to "0000000000000" set Data_D7 to "0" upcounter Address end vector !**************************************************************************** !**************************************************************************** !AT The following AwareTest units have been added for minimum pins tests. Each !AT unit tests a separate data pin starting with D0. unit "awaretest D0 Test" preset counter Address_Counter_D0 compress repeat 255 times count Address_Counter_D0 compress end repeat end unit unit "awaretest D1 Test" preset counter Address_Counter_D1 compress repeat 255 times count Address_Counter_D1 compress end repeat end unit unit "awaretest D2 Test" preset counter Address_Counter_D2 compress repeat 255 times count Address_Counter_D2 compress end repeat end unit unit "awaretest D3 Test" preset counter Address_Counter_D3 compress repeat 255 times count Address_Counter_D3 compress end repeat end unit unit "awaretest D4 Test" preset counter Address_Counter_D4 compress repeat 255 times count Address_Counter_D4 compress end repeat end unit unit "awaretest D5 Test" preset counter Address_Counter_D5 compress repeat 255 times count Address_Counter_D5 compress end repeat end unit unit "awaretest D6 Test" preset counter Address_Counter_D6 compress repeat 255 times count Address_Counter_D6 compress end repeat end unit unit "awaretest D7 Test" preset counter Address_Counter_D7 compress repeat 255 times count Address_Counter_D7 compress end repeat end unit ! ROM contents are partially verified by performing CRC check of the ! outputs while a counter cycles through the lower and upper 500 address ! locations. Results are compared against those of a known good board. unit "ROM Test lower" preset counter Lower_Address_Counter compress repeat 512 times count Lower_Address_Counter compress end repeat end unit unit "ROM Test upper" preset counter Upper_Address_Counter compress repeat 512 times count Upper_Address_Counter compress end repeat end unit ! End of Test