Reference Guides
A database of technical support documents, solutions, and examples written by support engineers.
2020-10-07
Application Notes
Find out why you can’t use SPICE for today’s SERDES design and why using IBIS AMI channel simulation for SERDES is better than other techniques.
2020-09-23
Application Notes
This paper reviews some of the benefits and limitations of using IBIS models and introduces the new AMI extensions to the latest IBIS version 5.0 specification.
2020-09-22
Training Materials
Brief overview of PathWave Design Software Customer Education and Services.
2019-04-06
Brochures
This brochure highlights the features of Keysight EEsof EDA's Advanced Design System (ADS); the industry's premier RF, Microwave and High-Speed Design platform.
2017-07-28
Brochures
Keysight EEsof EDA is the leading supplier of electronic design automation (EDA) software for communications product design.
2017-01-24
Demos
Stephen Slater, Keysight Product Manager for Signal and Power Integrity Solutions, shares his thoughts about DesignCon 2016.
2016-01-26
Reference Guides
Keysight EEsof EDA Product Documentation.
2014-12-08
Miscellaneous
Keysight Technologies announces it will demonstrate its latest hardware and electronic design automation software solution releases at EPEPS 2014, Embassy Suites Portland, Portland, Oregon, Oct. 26-29. Keysight is a silver-level sponsor of the event.
2014-10-23
Demos
This video is about design challenges in DDR4 and in particular the DDR Bus Simulator, which is a new Keysight EEsof EDA simulation tool for DDR4 and beyond.
2014-10-16
Data Sheets
The W2309EP DDR Bus Simulator quickly generates accurate BER contours, masks, and margins between the two, for the DDR memory bus specification published by JEDEC.
2014-10-08
Demos
This video provides an overview of Keysight's DDR Memory test solutions, from simulation, transmitter compliance, protocol, and probing solutions.
2014-10-03
Demos
The W2351EP DDR4 Compliance Test Bench helps solve the problem of simulation-measurement correlation.
2014-10-03
Miscellaneous
Keysight Technologies introduces the DDR Bus Simulator; the industry’s first tool to generate accurate Bit-Error-Rate (BER) contours for the JEDEC DDR memory bus specification.
2014-09-30
White Papers
Explore a simulation workflow for debugging high-speed digital designs using jitter separation. Jitter separation identifies the sources of signal integrity degradation.
2014-08-03
Brochures
This brochure describes 3 ADS suites of applicable simulators, libraries, and capabilities for signal integrity engineers.
2014-07-31
Demos
This video shows the high speed digital design flow from Keysight that helps you cut through the challenges of today's multi-gigabit standards.
2012-01-31
Technical Specifications
Provides designers with the capability to convert measured or simulated S-parameter models to lumped equivalent or pole zero representations.
2011-06-27
Technical Specifications
Advanced time-domain simulator that extends the capability of the High Frequency SPICE module by accurately simulating frequency-dependent components (distributed elements, S-parameter data files, transmission lines, etc.) in a time-domain simulator.
2011-06-27
Technical Specifications
Analyzes sources of performance-degrading jitter in multi-gigabit communication link designs. It helps designers find and remove the causes of jitter before hardware prototyping begins, eliminating costly redesign later in the development cycle.
2011-06-27
Technical Specifications
Nonlinear, time-domain simulator for analyzing very large base-band circuits, startup transients, oscillators, and high-speed digital and switching circuits.
2011-06-27
Technical Specifications
I/O Buffer Information Specification (IBIS) models for modeling the nonlinear behavior of IC drivers, outputs, and receivers, inputs.
2011-06-27