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The PLD ISP feature allows the test developer engineer to specify a configuration bitstream file in VCL digital test file, much like programming a Flash memory device. The PLD ISP feature supports multiple PLD configuration data formats are supported including. Serial Vector Format (SVF), Standard Test And Programming Language (STAPL), Jam, Jam Byte Code (JBC) object files.

HIGHLIGHTS

A Programmable Logic Device (PLD) is used by designers when they need to set or change the function of the device installed on the circuit board. These devices are usually used in the NPI stage of the circuit board. To set the function of the PLD, it needs to be programmed.

The PLD ISP feature allows the test developer engineer to specify a configuration bitstream file in a VCL digital test file, much like programming a Flash memory device. The PLD ISP feature supports multiple PLD configuration data formats, including:

  • Serial Vector Format (SVF)
  • Standard Test And Programming Language (STAPL)
  • Jam
  • Jam Byte Code (JBC) object files

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