!!!!    6    0    1  974792418  V4570                                         

!  $Log: <@(#) A.10.00  New library.> $

!-----------------------------------------------------------------------
!  Copyright (c) Hewlett-Packard Co. 1996
!
!  All Rights Reserved.  Reproduction, adaptation, or translation
!  without prior written permission is prohibited, except as allowed
!  under the copyright laws.
!
!-----------------------------------------------------------------------
!
! Device        : 74f8961
! Manufacturer  : PHILIPS
! Description   : Octal Latched Bidirectional Futurebus Transceiver, NINV (OC)
! Package       : 28-Pin DIP
! Test Platform : HP3070
! Safeguard     : hi_oc_fttl
! Modifications : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."
!
!-----------------------------------------------------------------------
!
! Additional Information.
!
!       1.      Chip Marking:
!
!                          PHILIPS 74F8961N
!                                  KQL9735
!                                  9522hC
!
!       2.      Ordering Information:
!                       Part Number             Package
!
!                       N74F8961N               28-Pin DIP
!                       N74F8961A               28_Pin PLCC
!
!------------------------------------------------------------------------------

combinatorial

vector cycle 500n
receive delay 400n

assign   VCC            to pins   1
assign   GND            to pins   4,  8, 11, 18, 22, 25

assign   E1_A           to pins   3
assign   E1_B           to pins  27
assign   E2_A           to pins   5
assign   E2_B           to pins  26
assign   E3_A           to pins   6
assign   E3_B           to pins  24
assign   E4_A           to pins   7
assign   E4_B           to pins  23
assign   E5_A           to pins   9
assign   E5_B           to pins  21
assign   E6_A           to pins  10
assign   E6_B           to pins  20
assign   E7_A           to pins  12
assign   E7_B           to pins  19
assign   E8_A           to pins  13
assign   E8_B           to pins  17

assign   All_A          to pins   3,  5,  6,  7,  9, 10, 12, 13
assign   All_B          to pins  27, 26, 24, 23, 21, 20, 19, 17

assign   Enable_AB_bar  to pins  15, 16
assign   Enable_BA_bar  to pins   2
assign   Enables        to pins   2, 15, 16

assign   L_Enable       to pins  28

assign   VX             to pins  14

family   TTL

power    VCC, GND

inputs   Enable_AB_bar, Enable_BA_bar, Enables, L_Enable

bidirectional  E1_A, E1_B, E2_A, E2_B, E3_A, E3_B, E4_A, E4_B
bidirectional  E5_A, E5_B, E6_A, E6_B, E7_A, E7_B, E8_A, E8_B
bidirectional  All_A, All_B

nondigital     VX

set load on groups ALL_A, ALL_B to pull up

disable  All_A     with Enable_BA_bar      to    "0"
disable  All_B     with Enable_AB_bar      to    "1X"
disable  All_B     with Enable_AB_bar      to    "X1"

when Enable_BA_bar is "1"  inputs All_B
when Enable_BA_bar is "1"  outputs All_A

when Enable_AB_bar is "00" inputs All_A
when Enable_AB_bar is "00" outputs All_B

trace E1_A to E1_B, Enable_AB_bar, Enable_BA_bar
trace E2_A to E2_B, Enable_AB_bar, Enable_BA_bar
trace E3_A to E3_B, Enable_AB_bar, Enable_BA_bar
trace E4_A to E4_B, Enable_AB_bar, Enable_BA_bar
trace E5_A to E5_B, Enable_AB_bar, Enable_BA_bar
trace E6_A to E6_B, Enable_AB_bar, Enable_BA_bar
trace E7_A to E7_B, Enable_AB_bar, Enable_BA_bar
trace E8_A to E8_B, Enable_AB_bar, Enable_BA_bar

trace E1_B to E1_A, Enable_AB_bar, Enable_BA_bar
trace E2_B to E2_A, Enable_AB_bar, Enable_BA_bar
trace E3_B to E3_A, Enable_AB_bar, Enable_BA_bar
trace E4_B to E4_A, Enable_AB_bar, Enable_BA_bar
trace E5_B to E5_A, Enable_AB_bar, Enable_BA_bar
trace E6_B to E6_A, Enable_AB_bar, Enable_BA_bar
trace E7_B to E7_A, Enable_AB_bar, Enable_BA_bar
trace E8_B to E8_A, Enable_AB_bar, Enable_BA_bar

!
!-----------------------------------------------------------------------
!

vector  LE_lo
   set   L_Enable       to "0"
end vector

vector  LE_hi
   set   L_Enable       to "1"
end vector

vector  E8_AB_input_lo
   drive All_A
   receive  All_B
   set   Enables        to "000"
   set   E8_A           to "0"
end vector

vector  E8_AB_output_lo
   drive All_A
   receive  All_B
   set   Enables        to "000"
   set   E8_B           to "0"
end vector

vector  E1_A_hi_LE
   drive All_A
   receive  All_B
   set   L_Enable       to "1"
   set   Enables        to "000"
   set   E1_A           to "1"
   set   E1_B           to "1"
end vector

vector  E1_A_lo_LE
   drive All_A
   receive  All_B
   set   L_Enable       to "1"
   set   Enables        to "000"
   set   E1_A           to "0"
   set   E1_B           to "0"
end vector

vector  E1_A_hi
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E1_A           to "1"
   set   E1_B           to "1"
end vector

vector  E1_A_lo
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E1_A           to "0"
   set   E1_B           to "0"
end vector

vector  E2_A_hi
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E2_A           to "1"
   set   E2_B           to "1"
end vector

vector  E2_A_lo
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E2_A           to "0"
   set   E2_B           to "0"
end vector

vector  E3_A_hi
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E3_A           to "1"
   set   E3_B           to "1"
end vector

vector  E3_A_lo
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E3_A           to "0"
   set   E3_B           to "0"
end vector

vector  E4_A_hi
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E4_A           to "1"
   set   E4_B           to "1"
end vector

vector  E4_A_lo
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E4_A           to "0"
   set   E4_B           to "0"
end vector

vector  E5_A_hi
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E5_A           to "1"
   set   E5_B           to "1"
end vector

vector  E5_A_lo
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E5_A           to "0"
   set   E5_B           to "0"
end vector

vector  E6_A_hi
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E6_A           to "1"
   set   E6_B           to "1"
end vector

vector  E6_A_lo
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E6_A           to "0"
   set   E6_B           to "0"
end vector

vector  E7_A_hi
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E7_A           to "1"
   set   E7_B           to "1"
end vector

vector  E7_A_lo
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E7_A           to "0"
   set   E7_B           to "0"
end vector

vector  E8_A_hi
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E8_A           to "1"
   set   E8_B           to "1"
end vector

vector  E8_A_lo
   drive All_A
   receive  All_B
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "000"
   set   E8_A           to "0"
   set   E8_B           to "0"
end vector

vector  E1_B_hi
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E1_B           to "1"
   set   E1_A           to "1"
end vector

vector  E1_B_lo
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E1_B           to "0"
   set   E1_A           to "0"
end vector

vector  E2_B_hi
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E2_B           to "1"
   set   E2_A           to "1"
end vector

vector  E2_B_lo
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E2_B           to "0"
   set   E2_A           to "0"
end vector

vector  E3_B_hi
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E3_B           to "1"
   set   E3_A           to "1"
end vector

vector  E3_B_lo
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E3_B           to "0"
   set   E3_A           to "0"
end vector

vector  E4_B_hi
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E4_B           to "1"
   set   E4_A           to "1"
end vector

vector  E4_B_lo
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E4_B           to "0"
   set   E4_A           to "0"
end vector

vector  E5_B_hi
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E5_B           to "1"
   set   E5_A           to "1"
end vector

vector  E5_B_lo
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E5_B           to "0"
   set   E5_A           to "0"
end vector

vector  E6_B_hi
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E6_B           to "1"
   set   E6_A           to "1"
end vector

vector  E6_B_lo
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E6_B           to "0"
   set   E6_A           to "0"
end vector

vector  E7_B_hi
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E7_B           to "1"
   set   E7_A           to "1"
end vector

vector  E7_B_lo
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E7_B           to "0"
   set   E7_A           to "0"
end vector

vector  E8_B_hi
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E8_B           to "1"
   set   E8_A           to "1"
end vector

vector  E8_B_lo
   drive All_B
   receive  All_A
   set   L_Enable       to "0"        !AT Added this line
   set   Enables        to "111"
   set   E8_B           to "0"
   set   E8_A           to "0"
end vector

!*****VECTORS FOR DISABLE TESTS*****

vector  E1_A_hi_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E1_A           to "1"
   set   E1_B           to "1"
end vector

vector  E1_A_lo_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E1_A           to "0"
   set   E1_B           to "0"
end vector

vector  E2_A_hi_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E2_A           to "1"
   set   E2_B           to "1"
end vector

vector  E2_A_lo_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E2_A           to "0"
   set   E2_B           to "0"
end vector

vector  E3_A_hi_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E3_A           to "1"
   set   E3_B           to "1"
end vector

vector  E3_A_lo_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E3_A           to "0"
   set   E3_B           to "0"
end vector

vector  E4_A_hi_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E4_A           to "1"
   set   E4_B           to "1"
end vector

vector  E4_A_lo_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E4_A           to "0"
   set   E4_B           to "0"
end vector

vector  E5_A_hi_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E5_A           to "1"
   set   E5_B           to "1"
end vector

vector  E5_A_lo_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E5_A           to "0"
   set   E5_B           to "0"
end vector

vector  E6_A_hi_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E6_A           to "1"
   set   E6_B           to "1"
end vector

vector  E6_A_lo_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E6_A           to "0"
   set   E6_B           to "0"
end vector

vector  E7_A_hi_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E7_A           to "1"
   set   E7_B           to "1"
end vector

vector  E7_A_lo_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E7_A           to "0"
   set   E7_B           to "0"
end vector

vector  E8_A_hi_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E8_A           to "1"
   set   E8_B           to "1"
end vector

vector  E8_A_lo_Disabled_1
   drive All_A
   receive  All_B
   set   Enables        to "001"
   set   E8_A           to "0"
   set   E8_B           to "0"
end vector

vector  E1_A_hi_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E1_A           to "1"
   set   E1_B           to "1"
end vector

vector  E1_A_lo_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E1_A           to "0"
   set   E1_B           to "0"
end vector

vector  E2_A_hi_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E2_A           to "1"
   set   E2_B           to "1"
end vector

vector  E2_A_lo_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E2_A           to "0"
   set   E2_B           to "0"
end vector

vector  E3_A_hi_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E3_A           to "1"
   set   E3_B           to "1"
end vector

vector  E3_A_lo_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E3_A           to "0"
   set   E3_B           to "0"
end vector

vector  E4_A_hi_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E4_A           to "1"
   set   E4_B           to "1"
end vector

vector  E4_A_lo_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E4_A           to "0"
   set   E4_B           to "0"
end vector

vector  E5_A_hi_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E5_A           to "1"
   set   E5_B           to "1"
end vector

vector  E5_A_lo_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E5_A           to "0"
   set   E5_B           to "0"
end vector

vector  E6_A_hi_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E6_A           to "1"
   set   E6_B           to "1"
end vector

vector  E6_A_lo_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E6_A           to "0"
   set   E6_B           to "0"
end vector

vector  E7_A_hi_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E7_A           to "1"
   set   E7_B           to "1"
end vector

vector  E7_A_lo_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E7_A           to "0"
   set   E7_B           to "0"
end vector

vector  E8_A_hi_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E8_A           to "1"
   set   E8_B           to "1"
end vector

vector  E8_A_lo_Disabled_2
   drive All_A
   receive  All_B
   set   Enables        to "010"
   set   E8_A           to "0"
   set   E8_B           to "0"
end vector

vector  E1_B_hi_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E1_B           to "1"
   set   E1_A           to "1"
end vector

vector  E1_B_lo_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E1_B           to "0"
   set   E1_A           to "0"
end vector

vector  E2_B_hi_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E2_B           to "1"
   set   E2_A           to "1"
end vector

vector  E2_B_lo_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E2_B           to "0"
   set   E2_A           to "0"
end vector

vector  E3_B_hi_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E3_B           to "1"
   set   E3_A           to "1"
end vector

vector  E3_B_lo_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E3_B           to "0"
   set   E3_A           to "0"
end vector

vector  E4_B_hi_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E4_B           to "1"
   set   E4_A           to "1"
end vector

vector  E4_B_lo_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E4_B           to "0"
   set   E4_A           to "0"
end vector

vector  E5_B_hi_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E5_B           to "1"
   set   E5_A           to "1"
end vector

vector  E5_B_lo_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E5_B           to "0"
   set   E5_A           to "0"
end vector

vector  E6_B_hi_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E6_B           to "1"
   set   E6_A           to "1"
end vector

vector  E6_B_lo_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E6_B           to "0"
   set   E6_A           to "0"
end vector

vector  E7_B_hi_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E7_B           to "1"
   set   E7_A           to "1"
end vector

vector  E7_B_lo_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E7_B           to "0"
   set   E7_A           to "0"
end vector

vector  E8_B_hi_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E8_B           to "1"
   set   E8_A           to "1"
end vector

vector  E8_B_lo_Disabled_1
   drive All_B
   receive  All_A
   set   Enables        to "011"
   set   E8_B           to "0"
   set   E8_A           to "0"
end vector

!
!-----------------------------------------------------------------------
!

unit "awaretest E1 B in, A out"       !AT Modified the unit name
   execute  E1_B_lo
   execute  E1_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E2 B in, A out"       !AT Added this unit
   execute  E2_B_lo
   execute  E2_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E3 B in, A out"       !AT Added this unit
   execute  E3_B_lo
   execute  E3_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E4 B in, A out"       !AT Added this unit
   execute  E4_B_lo
   execute  E4_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E5 B in, A out"       !AT Added this unit
   execute  E5_B_lo
   execute  E5_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E6 B in, A out"       !AT Added this unit
   execute  E6_B_lo
   execute  E6_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E7 B in, A out"       !AT Added this unit
   execute  E7_B_lo
   execute  E7_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E8 B in, A out"       !AT Added this unit
   execute  E8_B_lo
   execute  E8_B_hi
end unit

unit "awaretest E1 A in, B out"       !AT Modified the unit name
   execute  E1_A_lo
   execute  E1_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E2 A in, B out"       !AT Added this unit
   execute  E2_A_lo
   execute  E2_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E3 A in, B out"       !AT Added this unit
   execute  E3_A_lo
   execute  E3_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E4 A in, B out"       !AT Added this unit
   execute  E4_A_lo
   execute  E4_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E5 A in, B out"       !AT Added this unit
   execute  E5_A_lo
   execute  E5_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E6 A in, B out"       !AT Added this unit
   execute  E6_A_lo
   execute  E6_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E7 A in, B out"       !AT Added this unit
   execute  E7_A_lo
   execute  E7_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E8 A in, B out"       !AT Added this unit
   execute  E8_A_lo
   execute  E8_A_hi
end unit

!*****TESTS FOR DISABLE **************************

unit  disable test "Disable Test 1 for Outputs B"
   execute  LE_lo
   execute  E1_A_lo_Disabled_1
   execute  E1_A_hi_Disabled_1
   execute  E1_A_lo_Disabled_1
   execute  E2_A_lo_Disabled_1
   execute  E2_A_hi_Disabled_1
   execute  E2_A_lo_Disabled_1
   execute  E3_A_lo_Disabled_1
   execute  E3_A_hi_Disabled_1
   execute  E3_A_lo_Disabled_1
   execute  E4_A_lo_Disabled_1
   execute  E4_A_hi_Disabled_1
   execute  E4_A_lo_Disabled_1
   execute  E5_A_lo_Disabled_1
   execute  E5_A_hi_Disabled_1
   execute  E5_A_lo_Disabled_1
   execute  E6_A_lo_Disabled_1
   execute  E6_A_hi_Disabled_1
   execute  E6_A_lo_Disabled_1
   execute  E7_A_lo_Disabled_1
   execute  E7_A_hi_Disabled_1
   execute  E7_A_lo_Disabled_1
   execute  E8_A_lo_Disabled_1
   execute  E8_A_hi_Disabled_1
   execute  E8_A_lo_Disabled_1
end unit

unit  disable test "Disable Test 2 for Outputs B"
   execute  LE_lo
   execute  E1_A_lo_Disabled_2
   execute  E1_A_hi_Disabled_2
   execute  E1_A_lo_Disabled_2
   execute  E2_A_lo_Disabled_2
   execute  E2_A_hi_Disabled_2
   execute  E2_A_lo_Disabled_2
   execute  E3_A_lo_Disabled_2
   execute  E3_A_hi_Disabled_2
   execute  E3_A_lo_Disabled_2
   execute  E4_A_lo_Disabled_2
   execute  E4_A_hi_Disabled_2
   execute  E4_A_lo_Disabled_2
   execute  E5_A_lo_Disabled_2
   execute  E5_A_hi_Disabled_2
   execute  E5_A_lo_Disabled_2
   execute  E6_A_lo_Disabled_2
   execute  E6_A_hi_Disabled_2
   execute  E6_A_lo_Disabled_2
   execute  E7_A_lo_Disabled_2
   execute  E7_A_hi_Disabled_2
   execute  E7_A_lo_Disabled_2
   execute  E8_A_lo_Disabled_2
   execute  E8_A_hi_Disabled_2
   execute  E8_A_lo_Disabled_2
end unit

unit  disable test "Disable Test 1 for Outputs A"
   execute  LE_lo
   execute  E1_B_lo_Disabled_1
   execute  E1_B_hi_Disabled_1
   execute  E1_B_lo_Disabled_1
   execute  E2_B_lo_Disabled_1
   execute  E2_B_hi_Disabled_1
   execute  E2_B_lo_Disabled_1
   execute  E3_B_lo_Disabled_1
   execute  E3_B_hi_Disabled_1
   execute  E3_B_lo_Disabled_1
   execute  E4_B_lo_Disabled_1
   execute  E4_B_hi_Disabled_1
   execute  E4_B_lo_Disabled_1
   execute  E5_B_lo_Disabled_1
   execute  E5_B_hi_Disabled_1
   execute  E5_B_lo_Disabled_1
   execute  E6_B_lo_Disabled_1
   execute  E6_B_hi_Disabled_1
   execute  E6_B_lo_Disabled_1
   execute  E7_B_lo_Disabled_1
   execute  E7_B_hi_Disabled_1
   execute  E7_B_lo_Disabled_1
   execute  E8_B_lo_Disabled_1
   execute  E8_B_hi_Disabled_1
   execute  E8_B_lo_Disabled_1
end unit

unit  disable test "Test Latch Enable"
   execute  E1_A_lo_LE
   execute  E1_A_hi_LE
end unit

!
!  End of test
!