!!!!    6    0    1  974731308  Vcb10                                         

! Device           : 7411620
! Function         : bus_transceiver 3-state inverting octal
! revision         : B.01.00
! safeguard        : standard_acmos
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

combinatorial

assign   VCC       to pins   18,19
assign   GND       to pins   5,6,7,8

assign   E1_A      to pins   1
assign   E1_B      to pins   23
assign   E2_A      to pins   2
assign   E2_B      to pins   22
assign   E3_A      to pins   3
assign   E3_B      to pins   21
assign   E4_A      to pins   4
assign   E4_B      to pins   20
assign   E5_A      to pins   9
assign   E5_B      to pins   17
assign   E6_A      to pins   10
assign   E6_B      to pins   16
assign   E7_A      to pins   11
assign   E7_B      to pins   15
assign   E8_A      to pins   12
assign   E8_B      to pins   14

assign   All_A     to pins   1,2,3,4,9,10,11,12
assign   All_B     to pins   23,22,21,20,17,16,15,14

assign   Enable_AB      to pins   24
assign   Enable_BA_bar  to pins   13
assign   Enables        to pins   24,13

family   TTL

power    VCC, GND

inputs   Enable_AB, Enable_BA_bar, Enables

bidirectional  E1_A, E1_B, E2_A, E2_B, E3_A, E3_B, E4_A, E4_B
bidirectional  E5_A, E5_B, E6_A, E6_B, E7_A, E7_B, E8_A, E8_B
bidirectional  All_A, All_B

disable   All_A     with Enable_BA_bar  to    "1"
disable   All_B     with Enable_AB      to    "0"

when Enable_AB is "1" inputs All_A
when Enable_AB is "1" outputs All_B

when Enable_BA_bar is "0" inputs All_B
when Enable_BA_bar is "0" outputs All_A

trace E1_A to E1_B, Enable_AB, Enable_BA_bar
trace E2_A to E2_B, Enable_AB, Enable_BA_bar
trace E3_A to E3_B, Enable_AB, Enable_BA_bar
trace E4_A to E4_B, Enable_AB, Enable_BA_bar
trace E5_A to E5_B, Enable_AB, Enable_BA_bar
trace E6_A to E6_B, Enable_AB, Enable_BA_bar
trace E7_A to E7_B, Enable_AB, Enable_BA_bar
trace E8_A to E8_B, Enable_AB, Enable_BA_bar

trace E1_B to E1_A, Enable_AB, Enable_BA_bar
trace E2_B to E2_A, Enable_AB, Enable_BA_bar
trace E3_B to E3_A, Enable_AB, Enable_BA_bar
trace E4_B to E4_A, Enable_AB, Enable_BA_bar
trace E5_B to E5_A, Enable_AB, Enable_BA_bar
trace E6_B to E6_A, Enable_AB, Enable_BA_bar
trace E7_B to E7_A, Enable_AB, Enable_BA_bar
trace E8_B to E8_A, Enable_AB, Enable_BA_bar
!*********************************************************************
!*********************************************************************

vector  Enable_A_in
   set   Enable_AB      to "1"
   set   Enable_BA_bar  to "1"
end vector

vector  Enable_B_in
   set   Enable_AB      to "0"
   set   Enable_BA_bar  to "0"
end vector

vector  E1_A_hi
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E1_A           to "1"
   set   E1_B           to "0"
end vector

vector  E1_A_lo
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E1_A           to "0"
   set   E1_B           to "1"
end vector

vector  E2_A_hi
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E2_A           to "1"
   set   E2_B           to "0"
end vector

vector  E2_A_lo
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E2_A           to "0"
   set   E2_B           to "1"
end vector

vector  E3_A_hi
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E3_A           to "1"
   set   E3_B           to "0"
end vector

vector  E3_A_lo
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E3_A           to "0"
   set   E3_B           to "1"
end vector

vector  E4_A_hi
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E4_A           to "1"
   set   E4_B           to "0"
end vector

vector  E4_A_lo
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E4_A           to "0"
   set   E4_B           to "1"
end vector

vector  E5_A_hi
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E5_A           to "1"
   set   E5_B           to "0"
end vector

vector  E5_A_lo
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E5_A           to "0"
   set   E5_B           to "1"
end vector

vector  E6_A_hi
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E6_A           to "1"
   set   E6_B           to "0"
end vector

vector  E6_A_lo
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E6_A           to "0"
   set   E6_B           to "1"
end vector

vector  E7_A_hi
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E7_A           to "1"
   set   E7_B           to "0"
end vector

vector  E7_A_lo
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E7_A           to "0"
   set   E7_B           to "1"
end vector

vector  E8_A_hi
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E8_A           to "1"
   set   E8_B           to "0"
end vector

vector  E8_A_lo
   drive All_A
   receive  All_B
   set   Enables        to "11"
   set   E8_A           to "0"
   set   E8_B           to "1"
end vector

vector  E1_B_hi
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E1_B           to "1"
   set   E1_A           to "0"
end vector

vector  E1_B_lo
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E1_B           to "0"
   set   E1_A           to "1"
end vector

vector  E2_B_hi
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E2_B           to "1"
   set   E2_A           to "0"
end vector

vector  E2_B_lo
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E2_B           to "0"
   set   E2_A           to "1"
end vector

vector  E3_B_hi
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E3_B           to "1"
   set   E3_A           to "0"
end vector

vector  E3_B_lo
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E3_B           to "0"
   set   E3_A           to "1"
end vector

vector  E4_B_hi
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E4_B           to "1"
   set   E4_A           to "0"
end vector

vector  E4_B_lo
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E4_B           to "0"
   set   E4_A           to "1"
end vector

vector  E5_B_hi
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E5_B           to "1"
   set   E5_A           to "0"
end vector

vector  E5_B_lo
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E5_B           to "0"
   set   E5_A           to "1"
end vector

vector  E6_B_hi
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E6_B           to "1"
   set   E6_A           to "0"
end vector

vector  E6_B_lo
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E6_B           to "0"
   set   E6_A           to "1"
end vector

vector  E7_B_hi
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E7_B           to "1"
   set   E7_A           to "0"
end vector

vector  E7_B_lo
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E7_B           to "0"
   set   E7_A           to "1"
end vector

vector  E8_B_hi
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E8_B           to "1"
   set   E8_A           to "0"
end vector

vector  E8_B_lo
   drive All_B
   receive  All_A
   set   Enables        to "00"
   set   E8_B           to "0"
   set   E8_A           to "1"
end vector

!*********************************************************************
!*********************************************************************

unit "awaretest E1 A in, B out"       !AT Modified the unit name
   execute  E1_A_lo
   execute  E1_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E2 A in, B out"       !AT Added this unit
   execute  E2_A_lo
   execute  E2_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E3 A in, B out"       !AT Added this unit
   execute  E3_A_lo
   execute  E3_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E4 A in, B out"       !AT Added this unit
   execute  E4_A_lo
   execute  E4_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E5 A in, B out"       !AT Added this unit
   execute  E5_A_lo
   execute  E5_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E6 A in, B out"       !AT Added this unit
   execute  E6_A_lo
   execute  E6_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E7 A in, B out"       !AT Added this unit
   execute  E7_A_lo
   execute  E7_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E8 A in, B out"       !AT Added this unit
   execute  E8_A_lo
   execute  E8_A_hi
end unit

unit "awaretest E1 B in, A out"       !AT Modified the unit name
   execute  E1_B_lo
   execute  E1_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E2 B in, A out"       !AT Added this unit
   execute  E2_B_lo
   execute  E2_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E3 B in, A out"       !AT Added this unit
   execute  E3_B_lo
   execute  E3_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E4 B in, A out"       !AT Added this unit
   execute  E4_B_lo
   execute  E4_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E5 B in, A out"       !AT Added this unit
   execute  E5_B_lo
   execute  E5_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E6 B in, A out"       !AT Added this unit
   execute  E6_B_lo
   execute  E6_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E7 B in, A out"       !AT Added this unit
   execute  E7_B_lo
   execute  E7_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E8 B in, A out"       !AT Added this unit
   execute  E8_B_lo
   execute  E8_B_hi
end unit

!    End of test