Course

DDR5 Simulation with Memory Designer

Courses
3 items

Learn how to run a 3D EM simulation, set up a multi-lane memory simulation, and build a preliminary memory interface virtual prototype.

Learn:

Why DDR5 memory has more difficult designs constraints than DDR4
How PathWave ADS Memory Designer provides a comprehensive workflow for the latest digital memory standards like LPDDR5 and GDDR6
PathWave Advanced Design System (ADS) with bundle W3622B for SerDes and memory simulation

Lessons

Lesson 1 - Memory Designer Tutorial

Simulating with Memory Designer to perform an eye measurement.

White Papers

Designing for DDR4 and Beyond

The video provides an overview of how to use Keysight's Memory Designer software to simulate memory interfaces. The video covers the creation of a memory interface model, running a 3D electromagnetic simulation, importing the results of the simulation, and performing eye diagram analysis. Memory Designer can be used to accurately model the effects of the PCB layout on the signal integrity of the memory interface, perform what-if analysis to identify the impact of different design changes, and verify that the memory interface meets its performance requirements.

eBooks

Four Considerations for High-speed Digital Design Success

High-speed digital standards are quickly evolving to keep pace with the data demand from emerging technologies such as 5G, the Internet of Things, artificial intelligence, virtual reality, and autonomous vehicles.

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