!!!!    6    0    1  991876833  Vd619                                         

! Device           : 74c95
! Function         : shift_register totem 4-bit_parallel-in/out_serial-in
! revision         : B.01.00
! safeguard        : 74c_cmos
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

sequential

vector cycle 1u
receive delay 900n

assign  VDD         to pins 4
assign  VSS         to pins 11

assign  Parallel_inputs to pins 14,2,3,5
assign  A_input         to pins 14
assign  B_input         to pins 2
assign  C_input         to pins 3
assign  D_input         to pins 5
assign  Serial_input    to pins 1

assign  QA_output   to pins 13
assign  QB_output   to pins 12
assign  QC_output   to pins 10
assign  QD_output   to pins 9
assign  Outputs     to pins 13,12,10,9
assign  D0          to pins  9         !AT Added for minimum pin test.
assign  D1          to pins 10         !AT Added for minimum pin test.
assign  D2          to pins 12         !AT Added for minimum pin test.
assign  D3          to pins 13         !AT Added for minimum pin test.

assign  Clock_1     to pins 7
assign  Clock_2     to pins 8
assign  Mode        to pins 6

family  CMOS

power   VDD, VSS

inputs  Parallel_inputs, A_input, B_input, C_input, D_input
inputs  Serial_input,Clock_1, Clock_2, Mode

outputs QA_output, QB_output, QC_output, QD_output, Outputs
outputs D0, D1, D2, D3          !AT Added for minimum pin test.

trace  QA_output to  A_input
trace  QA_output to  Serial_input,Clock_1, Clock_2, Mode

trace  QB_output to  A_input,B_Input
trace  QB_output to  Serial_input,Clock_1, Clock_2, Mode

trace  QC_output to  A_input,B_Input,C_Input
trace  QC_output to  Serial_input,Clock_1, Clock_2, Mode

trace  QD_output to  A_input,B_Input,C_Input,D_Input
trace  QD_output to  Serial_input,Clock_1, Clock_2, Mode


!*********************************************************************
!*********************************************************************

vector    Clock_1_high__serial
     set  Mode                to "0"
     set  Serial_input        to "k"
     set  Clock_1             to "1"
end vector

vector    Clock_1_high__shift
     set  Mode                to "0"
     set  Clock_1             to "1"
end vector

vector    Clock_1_low__serial
     set  Mode                to "0"
     set  Serial_input        to "k"
     set  Clock_1             to "0"
end vector

vector    Clock_1_low__shift
     set  Mode                to "0"
     set  Clock_1             to "0"
end vector

vector    Clock_2_high
     set  Mode                to "1"
     set  Parallel_inputs     to "kkkk"
     set  Clock_2             to "1"
end vector

vector    Clock_2_high__serial
     set  Mode                to "1"
     set  D_input             to "k"
     set  Clock_2             to "1"
end vector

vector    Clock_2_low
     set  Mode                to "1"
     set  Parallel_inputs     to "kkkk"
     set  Clock_2             to "0"
end vector

vector    Clock_2_low__serial
     set  Mode                to "1"
     set  D_input             to "k"
     set  Clock_2             to "0"
end vector

vector    Clocks_low
     set  Mode                to "k"
     set  Clock_1             to "0"
     set  Clock_2             to "0"
end vector

vector    D_input_high
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  D_input             to "1"
end vector

vector    D_input_low
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  D_input             to "0"
end vector

vector    Mode_low
     initialize to            Clocks_low
     set  Mode                to "0"
end vector

vector    Outputs_0000
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Outputs             to "0000"
end vector

vector    Outputs_0000_ksd
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "k"
     set  Outputs             to "0000"
end vector

vector    Outputs_0000__2
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  Outputs             to "0000"
end vector

vector    Outputs_0101
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Outputs             to "0101"
end vector

vector    Outputs_1010
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Outputs             to "1010"
end vector

vector    Outputs_1111
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Outputs             to "1111"
end vector

vector    Outputs_1111_ksd
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "k"
     set  Outputs             to "1111"
end vector

vector    Outputs_1111__2
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  Outputs             to "1111"
end vector

vector    Outputs_X010
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Outputs             to "X010"
end vector

vector    Outputs_XX01
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Outputs             to "XX01"
end vector

vector    Outputs_XXX0
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Outputs             to "XXX0"
end vector

vector    Parallel_inputs_0000
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  Parallel_inputs     to "0000"
end vector

vector    Parallel_inputs_0101
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  Parallel_inputs     to "0101"
end vector

vector    Parallel_inputs_1010
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  Parallel_inputs     to "1010"
end vector

vector    Parallel_inputs_1111
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  Parallel_inputs     to "1111"
end vector

vector    Serial_input_high
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "1"
end vector

vector    Serial_input_low
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "0"
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector    D0_0
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  D0                  to "0"
end vector

vector    D0_1
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  D0                  to "1"
end vector

vector    D1_0
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  D1                  to "0"
end vector

vector    D1_1
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  D1                  to "1"
end vector

vector    D2_0
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  D2                  to "0"
end vector

vector    D2_1
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  D2                  to "1"
end vector

vector    D3_0
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  D3                  to "0"
end vector

vector    D3_1
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  D3                  to "1"
end vector

vector    D0_0_ksd
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "k"
     set  D0                  to "0"
end vector

vector    D0_1_ksd
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "k"
     set  D0                  to "1"
end vector

vector    D1_0_ksd
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "k"
     set  D1                  to "0"
end vector

vector    D1_1_ksd
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "k"
     set  D1                  to "1"
end vector

vector    D2_0_ksd
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "k"
     set  D2                  to "0"
end vector

vector    D2_1_ksd
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "k"
     set  D2                  to "1"
end vector

vector    D3_0_ksd
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "k"
     set  D3                  to "0"
end vector

vector    D3_1_ksd
     set  Mode                to "0"
     set  Clock_1             to "0"
     set  Serial_input        to "k"
     set  D3                  to "1"
end vector

vector    D0_0__2
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  D0                  to "0"
end vector

vector    D0_1__2
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  D0                  to "1"
end vector

vector    D1_0__2
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  D1                  to "0"
end vector

vector    D1_1__2
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  D1                  to "1"
end vector

vector    D2_0__2
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  D2                  to "0"
end vector

vector    D2_1__2
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  D2                  to "1"
end vector

vector    D3_0__2
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  D3                  to "0"
end vector

vector    D3_1__2
     set  Mode                to "1"
     set  Clock_2             to "0"
     set  D3                  to "1"
end vector

!*********************************************************************
!*********************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D0.

unit "awaretest D0 serial right input Test"
     execute   Serial_input_low
     repeat    4 times
          execute   Clock_1_high__serial
          execute   Clock_1_low__serial
     end repeat
     execute   D0_0_ksd

     execute   Serial_input_high
     repeat    4 times
          execute   Clock_1_high__serial
          execute   Clock_1_low__serial
     end repeat
     execute   D0_1_ksd
end unit

unit "awaretest D1 serial right input Test"
     execute   Serial_input_low
     repeat    4 times
          execute   Clock_1_high__serial
          execute   Clock_1_low__serial
     end repeat
     execute   D1_0_ksd

     execute   Serial_input_high
     repeat    4 times
          execute   Clock_1_high__serial
          execute   Clock_1_low__serial
     end repeat
     execute   D1_1_ksd
end unit

unit "awaretest D2 serial right input Test"
     execute   Serial_input_low
     repeat    4 times
          execute   Clock_1_high__serial
          execute   Clock_1_low__serial
     end repeat
     execute   D2_0_ksd

     execute   Serial_input_high
     repeat    4 times
          execute   Clock_1_high__serial
          execute   Clock_1_low__serial
     end repeat
     execute   D2_1_ksd
end unit

unit "awaretest D3 serial right input Test"
     execute   Serial_input_low
     repeat    4 times
          execute   Clock_1_high__serial
          execute   Clock_1_low__serial
     end repeat
     execute   D3_0_ksd

     execute   Serial_input_high
     repeat    4 times
          execute   Clock_1_high__serial
          execute   Clock_1_low__serial
     end repeat
     execute   D3_1_ksd
end unit

unit "awaretest D0 parallel input, parallel output Test"
     execute   Parallel_inputs_0000
     execute   Clock_2_high
     execute   Clock_2_low
     execute   D0_0__2

     execute   Parallel_inputs_1111
     execute   Clock_2_high
     execute   Clock_2_low
     execute   D0_1__2
end unit

unit "awaretest D1 parallel input, parallel output Test"
     execute   Parallel_inputs_0000
     execute   Clock_2_high
     execute   Clock_2_low
     execute   D1_0__2

     execute   Parallel_inputs_1111
     execute   Clock_2_high
     execute   Clock_2_low
     execute   D1_1__2
end unit

unit "awaretest D2 parallel input, parallel output Test"
     execute   Parallel_inputs_0000
     execute   Clock_2_high
     execute   Clock_2_low
     execute   D2_0__2

     execute   Parallel_inputs_1111
     execute   Clock_2_high
     execute   Clock_2_low
     execute   D2_1__2
end unit

unit "awaretest D3 parallel input, parallel output Test"
     execute   Parallel_inputs_0000
     execute   Clock_2_high
     execute   Clock_2_low
     execute   D3_0__2

     execute   Parallel_inputs_1111
     execute   Clock_2_high
     execute   Clock_2_low
     execute   D3_1__2
end unit

!*********************************************************************

unit "serial right input"
     execute   Serial_input_low
     repeat    4 times
          execute   Clock_1_high__serial
          execute   Clock_1_low__serial
     end repeat
     execute   Outputs_0000_ksd
     execute   Serial_input_high
     repeat    4 times
          execute   Clock_1_high__serial
          execute   Clock_1_low__serial
     end repeat
     execute   Outputs_1111_ksd
     execute   Serial_input_low
     repeat    4 times
          execute   Clock_1_high__serial
          execute   Clock_1_low__serial
     end repeat
     execute   Outputs_0000_ksd
end unit

unit "parallel input, shift right"
     execute   Parallel_inputs_0101
     execute   Clock_2_high
     execute   Clock_2_low
     execute   Clocks_low
     execute   Mode_low
     execute   Outputs_0101
     execute   Clock_1_high__shift
     execute   Clock_1_low__shift
     execute   Outputs_X010
     execute   Clock_1_high__shift
     execute   Clock_1_low__shift
     execute   Outputs_XX01
     execute   Clock_1_high__shift
     execute   Clock_1_low__shift
     execute   Outputs_XXX0
     execute   Parallel_inputs_1010
     execute   Clock_2_high
     execute   Clock_2_low
     execute   Clocks_low
     execute   Mode_low
     execute   Outputs_1010
end unit

unit "parallel input, parallel output"
     execute   Parallel_inputs_0000
     execute   Clock_2_high
     execute   Clock_2_low
     execute   Outputs_0000__2
     execute   Parallel_inputs_1111
     execute   Clock_2_high
     execute   Clock_2_low
     execute   Outputs_1111__2
     execute   Parallel_inputs_0000
     execute   Clock_2_high
     execute   Clock_2_low
     execute   Outputs_0000__2
end unit

unit "shift left"
     tied      C_input, QD_output
     tied      B_input, QC_output
     tied      A_input, QB_output
     execute   D_input_low
     repeat    4 times
          execute   Clock_2_high__serial
          execute   Clock_2_low__serial
     end repeat
     execute   Outputs_0000__2
     execute   D_input_high
     repeat    4 times
          execute   Clock_2_high__serial
          execute   Clock_2_low__serial
     end repeat
     execute   Outputs_1111__2
     execute   D_input_low
     repeat    4 times
          execute   Clock_2_high__serial
          execute   Clock_2_low__serial
     end repeat
     execute   Outputs_0000__2
end unit

unit "circular shift, serial input tied to QD_output"
     tied      Serial_input, QD_output
     execute   Parallel_inputs_0101
     execute   Clock_2_high
     execute   Clock_2_low
     execute   Clocks_low
     execute   Mode_low
     execute   Outputs_0101
     execute   Clock_1_high__shift
     execute   Clock_1_low__shift
     execute   Outputs_1010
     execute   Clock_1_high__shift
     execute   Clock_1_low__shift
     execute   Outputs_0101
     execute   Parallel_inputs_1010
     execute   Clock_2_high
     execute   Clock_2_low
     execute   Clocks_low
     execute   Mode_low
     execute   Outputs_1010
end unit

!    End of test