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RFIC Design (GoldenGate) 2024 Product Release
Highlights
RFIC Design 2024 includes the following new and enhanced capabilities for:
Algorithms
- New Fast Envelope algorithm to capture strong nonlinear memory effects present in modulations with large channel bandwidths
- GPU acceleration is available to speed up simulations
Design with modulated signals
- The Virtual Test Benches have been upgraded to the 2024 SystemVue release
- Added the possibility to load customized VTB workspaces defining the SYSTEMVUE_VTB_DIR variable
User Interface
- Support of IC Studio 23.1
- Some parts of the user interface have been simplified to improve the usability and to ease the setup of complex large-signal simulations
- Dataset creation has been sped up to efficiently handle complex corners and sweeps scenarios
Models
- Support of TMI TMEMOD=2.0
- BSIM-SOI 100.1, Hicum Level0 V2.1, SimKit 5.8 and 5.9 are now available
- compatibility=eldo supported in diode
- table_param function now supports relative paths
RFIC Design 2024 is available now!
Description
RFIC Design 2024 delivers new and enhanced capabilities that improve productivity and efficiency for Silicon RFIC designers. In addition to bug fixes, RFIC Design 2024 aims at strengthening the integration inside Cadence's latest ADE flows through native PSF support. A number of major improvements have been made on Hspice compatibility and on the core speed of the parsing capabilities. Finally, this release complements the previous additions in Envelope to reduce runtime (Compact Test Signals and Distortion EVM) with the recent updates on modulation standards leveraged from Keysight instruments. This methodology includes a boost in flexibility as you can switch between Virtual Test Bench versions without waiting for a new release of PathWave RFIC Design.
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