- Control of master and target protocol and traffic behavior for traffic emulation and debugging.
- PCI state logic analyzer 32 k (1 M optional) with PCI-oriented triggering and storage qualification for convenient traffic analysis.
- PCI protocol checker monitors 25 protocol rules in real-time for capturing violations (according to PCI Specification Rev 2.1).
- Add-on comprehensive GUIs for convenient, interactive debugging performance analysis.
- Control over RS232, PCI, or bi-directional Centronics.
- Add-on, ready-to-run stress tests and protocol permutation library to intensify tests.
- Optional trigger sequencer with 64 branches to trigger, store data, decrement and pre-load counter.
- On-board 128 kB PCI memory and/or/ I/O space for emulating master and target resources.
The E2925A PCI Exerciser and Analyzer card is a fully programmable PCI master and target with an on-board PCI state logic analyzer, a PCI protocol observer and built-in test functions.
It is a powerful tool to accelerate the development of PCI devices and systems significantly, and ensure exhaustive verification at the earliest opportunity. The PCI Exerciser and Analyer hardware provides together with the Graphical User Interfaces (GUI) based on Windows® 95/NT an interactive instrument that can be used by engineers throughout the whole PCI developement process of chips, cards, and systems.
With its C-Application Programming Interface (C-API), the fully in-system programmable E2925A 32 bit, 33 MHz PCI Exerciser and Analyzer card can also be completely integrated into your test environment for validating your PCI based design.
Additional hardware and software modules (GUIs) allow you to tailor the E2925A PCI Exerciser and Analyzer card to your specific application needs.
- The E2970A PCI Analyzer Graphical User Interface for Windows 95 and Windows NT is a comprehensive graphical user interface for the E2925A's on board PCI state logic analyzer.
- The E2971A PCI Exerciser Graphical User Interface for Windows 95 and Windows NT is a comprehensive graphical user interface for the E2925A's programmable PCI master and target exerciser.
- The E2972A PCI Performance Analyzer is a comprehensive graphical user interface based on Windows 95 and Windows NT for the E2925A to evaluate and analyze PCI system performance in depth, so that PCI systems and componets are optimized.
- The E2974A Sub-System Stress Tests is a library of ready to run tests based on Windows 95 and Windows NT to stress PC systems and sub-systems through the PCI port during system validation.
- The E2975A PCI Protocol Permutator and Randomizer Software is a C-API library to set up deterministic protocol variations using a sophisticated permutation algorithm.
- A standalone 4 slot PCI backplane featuring bus arbitration and clock distribution allows card manufacturers to set up and test environment for timing measurements and card evaluation.
For complete details, click on the Data Sheet link.
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- The E2925A a programmable PCI master and target with on-board PCI state analyzer, featuring:
- - Control of master and target protocol and traffic behavior for traffic emulation and debugging.
- - PCI state logic analyzer 32 k (1 M optional) with PCI-oriented triggering and storage qualification for convenient traffic analysis.
- - PCI protocol checker monitors 25 protocol rules in real-time for capturing violations (according to PCI Specification Rev 2.1).
- - Add-on comprehensive GUIs for convenient, interactive debugging performance analysis.
- - Control over RS232, PCI, or bi-directional Centronics.
- - Add-on, ready-to-run stress tests and protocol permutation library to intensify tests.
- - Optional trigger sequencer with 64 branches to trigger, store data, decrement and pre-load counter.
- - On-board 128 kB PCI memory and/or/ I/O space for emulating master and target resources.
- - Programmable configuration space/expansion EEPROM.
- - On-board CPU with built-in test functions for system data integrity testing.
- - C-API programming library for complete integration into your test environment.
- - CPU port and static I/O signals to read and write DUT registers and signals beyond PCI.
