PathWave ADS 2024 Product Release

PathWave ADS 2024 continues to offer the industry’s most complete RF and Microwave, High-Speed Digital, and Power Electronics design capabilities in simulation software that you’ve come to depend on. This release includes new 2nd generation 3D-EM and 3D-planar solver and meshing technologies that offer up to 10x speed improvement, increased capacity, robustness, and accuracy. It enables multi-chip physical-electrical co-design and verification of today’s challenging 5G MMICs and Modules. It extends its open, multi-technology workflows, and enterprise scale and automation to enable the development of leadership technology to pioneer your Pre-6G and sub-THz research.

New PathWave ADS 2024 design capabilities include:

Design Editing and Layout

• Minimized mouse clicks (e.g., the Property Editor and Info panels now open by default for new ADS installations on the right side of Layout and Schematic windows). 
• The 'Edit Component Parameters...' dialog panel now supports editing of parameter values for multiple components simultaneously.
• The Smart Mount instances from different technologies can be directly stacked on one another in the same top-level design for multi-technology assembly, such as IC on Package.
• The Smart Mount Editor visualizes the placement of Smart Mount instances to specify the stacking and mounting parameters for error-free RF module assembly.
• New AEL functions are added for polygon manipulation and trace-end teardrop query to enhance layout automation and productivity.

Layout Verification

• Design Rule Checker (DRC)
  
  • DRC performance improvements for large designs.
  • Dummy Metal Fill Utility supports a start offset per layer.
• Electrical Rule Check (ERC)
  
  • ERC current density report comprehensively includes devices at all levels of the design hierarchy.
  • Calculates the equivalent trace width from arbitrary shapes other than traces for more reliable ERC.
• Layout Versus Schematic (LVS)
  
  • Physical Nets LVS supports edge pins in addition to area pins.
  • Physical Nets LVS supports running LVS on the nested IC from the top-level to facilitate efficient RF module design.

Data Display

• A new version (i.e., 0.7.0) of pwdatatools, is integrated with several enhancements:
  • New load-pull capabilities, including algorithms for contour plotting, re-gridding, data cleaning and export to ADS for power amplifier designs.
  • Reads SystemVue datasets for use in RF circuit design.
  • Reads Ansys HFSS far field data files (.ffd and portmap files) for EM design.
• Data-Display supports "-data <directory>" command line argument for specifying additional directories to look for datasets in the Expression Manager to develop more robust expressions.

Quantum Electronics

New QuantumPro EDA is now available in ADS 2024 to enable:

• Faster quantum chip development with: 
  • Integrated circuit/layout/EM qubit simulation.
  • Quantum-specific layout library.
  • Fast EM simulation with the Method of Moments (MoM).
  • Parametric analysis for fast iteration.
  • Automatic quantum parameter extraction.
  • Built-in design automation using ADS/QPro scripting.
• Greater confidence.
  • Multiple EM solvers (MoM, and FEM).
  • Cross-checking quantum parameter extraction using
    • Freq-Domain Extraction: It will show the coupling terms only between neighboring qubits and resonators.
    • Eigenmode Extraction: It will show the coupling terms even between distant qubits and resonators. 
• Modeling of the kinetic inductance in the EM flow.
• Lower knowledge barrier for microwave engineers to begin quantum design.

EM Simulation

• RFPRo
  • Faster 2nd Generation Momentum and FEM solver for faster, higher capacity EM simulation.
  • Enhanced intelligent meshing technology enables robust, high capacity and accurate EM simulation.
  • Enhanced direct top level driven parameterized sweeps.
  • Multi-domain connectivity check across technology boundaries to easily highlight all physically connected parts in complex modules.
  • ADS Superconductor material support for accurate designs to work at cryogenic temperatures.
• PIPro EM enhancements
  • Area Pin Select for high pin count BGA Devices and packages: Ground pins on the VRM/Sink can be filtered using the radial distance technique.
  • Virtual Decaps for both AC and CEMI analysis improves Decap Optimization flow with no layout modification to update list of decoupling capacitors. They act like actual components with positions determined by virtual pins.
  • Cascaded VRMs in PI-CEMI Analysis.

Electrothermal (ETH) Simulation

• More precise definition of material thermal conductivity, allowing multiple orthotropic materials to exist within a single thermal layer for the highest accuracy ETH circuit simulation.
• Higher capacity meshing algorithm expands ETH circuit simulation beyond the chip to PCBs and Modules.
• Static (DC and Harmonic Balance) swept ETH circuit simulation can be parallelized with high-performance computing (HPC) for fast results (W3059E PathWave HPC Accelerator).

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