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E9988GL In-Line High-Density ICT System; Series 7i : Discontinued & Obsolete
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K8228B Silicon Nails Feature Development and Runtime, GTE 10.00p
Starting from
The Silicon Nails test development tool also allows users to define the vectors that they would like to execute on the non-compliant boundary scan device. The test development tool will generate the boundary scan test to output or input at the relevant interconnecting pin, thus generating the test consistently.
K8223B DGN Advanced Reporting Feature, GTE 10.00p
Starting from
The Basic Diagnostics levels is the main troubleshooting tool used by all users to check the hardware configuration, and verify and isolate hardware failures. Some Diagnostic tests require that a Pin Verification Fixture be installed on the system.
K8220B PLD ISP Feature, GTE 10.00p
Starting from
The PLD ISP feature allows the test developer engineer to specify a configuration bitstream file in VCL digital test file, much like programming a Flash memory device. The PLD ISP feature supports multiple PLD configuration data formats are supported including. Serial Vector Format (SVF), Standard Test And Programming Language (STAPL), Jam, Jam Byte Code (JBC) object files.
K8219B Flash ISP Feature, GTE 10.00p
Starting from
The Flash ISP feature enables in-system programming that is usually executed through a flash player application that drives the MCU to execute the programming onto the flash device.
K8218B Drive-Thru Feature, GTE 10.00p
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The Drive Thru feature enables the test development software to test integrated circuits or connectors when there are no test points assigned between the resistor and the device.
K8217B Cover Extend Feature, GTE 10.00p
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Cover-Extend Technology (CET) extends the Boundary Scan limited access solution on non-boundary scan devices with the use of VTEP or nanoVTEP and CET signal conditioner card hardware.
K8215B Advanced Throughput Multiplier Feature, GTE 10.00p
Starting from
The Advanced Throughput Multiplier feature allows you to test up to two 1000 to 2000 node (between 1296 and 2592 nodes) boards simultaneously on a 4 module tester, thus dividing the test time by half.
K8214B Silicon Nails Feature, GTE 10.00p
Starting from
Keysight’s Silicon Nails feature enables all the tools required to develop and execute tests on non-compliant boundary scan devices that are connected to boundary scan compliant devices on the printed circuit board.
K8213B 1149.6 Boundary Scan Feature, GTE 10.00p
Starting from
Keysight’s Interconnect Plus Boundary Scan 1149.6 feature enables all the tools required to develop and execute this test method on the board under test. Compared to the 1149.1 standards, the 1149.6 standards define test methods for the boundary scan devices that are designed with AC coupled signals or differential nets needed for high-speed operations of the device.
K8212A 1149.1 Boundary Scan Feature, GTE 10.00p
Starting from
Boundary scan is a method for testing interconnections on printed circuit boards. Keysight’s Interconnect Plus Boundary Scan feature enables all the tools required to develop and execute this foundational test method on the board under test.
M6813B x1149 Software Version 2.0 Upgrade Plan (Runtime only)
Starting from
Software Version 2.0 Upgrade Plan for runtime is a service that allows the user to get the latest software revisions for their Keysight x1149 Boundary Scan Analyzer.
M6806B x1149 Software Version 2.0 Upgrade Plan (Runtime & Test Development)
Starting from
Software Version 2.0 Upgrade Plan for runtime and test development is a service that allows the user to get the latest software revisions for their Keysight x1149 Boundary Scan Analyzer.
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