!!!! 6 0 1 986757376 Veca4 ! Device : 10145 ! Function : Static RAM oc 16 x 4 ! revision : B.01.00 ! safeguard : standard_ecl ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." sequential assign VCC1 to pins 16 assign VCC2 to pins 16 assign VEE to pins 8 assign Address to pins 6,7,9,10 assign Data_in to pins 12,11,4,5 assign Data_in_D0 to pins 5 !AT Added for minimum pin test. assign Data_in_D1 to pins 4 !AT Added for minimum pin test. assign Data_in_D2 to pins 11 !AT Added for minimum pin test. assign Data_in_D3 to pins 12 !AT Added for minimum pin test. assign Data_out to pins 14,15,1,2 assign Data_out_D0 to pins 2 !AT Added for minimum pin test. assign Data_out_D1 to pins 1 !AT Added for minimum pin test. assign Data_out_D2 to pins 15 !AT Added for minimum pin test. assign Data_out_D3 to pins 14 !AT Added for minimum pin test. assign Chip_select_bar to pins 3 assign Write_enable_bar to pins 13 family ECL power VCC1, VCC2, VEE inputs Data_in, Address, Chip_select_bar, Write_enable_bar inputs Data_in_D0, Data_in_D1, Data_in_D2, Data_in_D3 !AT Added for min pin test. outputs Data_out outputs Data_out_D0, Data_out_D1, Data_out_D2, Data_out_D3 !AT Added for min pin test. disable Data_out with Chip_select_bar to "1" disable Data_out with Write_enable_bar to "0" trace Data_out to Data_in, Address, Chip_select_bar trace Data_out to Write_enable_bar !*************************************************************** !*************************************************************** vector Chip_select set Address to "kkkk" set Chip_select_bar to "0" set Write_enable_bar to "1" end vector vector Write_enable_low set Address to "kkkk" set Data_in to "kkkk" set Chip_select_bar to "0" set Write_enable_bar to "0" end vector vector Write_enable_high set Address to "kkkk" set Data_in to "kkkk" set Chip_select_bar to "0" set Write_enable_bar to "1" end vector vector Disable set Chip_select_bar to "1" set Write_enable_bar to "1" end vector vector Address_0000 initialize to Disable set Address to "0000" end vector vector Address_0001 initialize to Disable set Address to "0001" end vector vector Address_0010 initialize to Disable set Address to "0010" end vector vector Address_0011 initialize to Disable set Address to "0011" end vector vector Address_0100 initialize to Disable set Address to "0100" end vector vector Address_0101 initialize to Disable set Address to "0101" end vector vector Address_0110 initialize to Disable set Address to "0110" end vector vector Address_0111 initialize to Disable set Address to "0111" end vector vector Address_1000 initialize to Disable set Address to "1000" end vector vector Address_1001 initialize to Disable set Address to "1001" end vector vector Address_1010 initialize to Disable set Address to "1010" end vector vector Address_1011 initialize to Disable set Address to "1011" end vector vector Address_1100 initialize to Disable set Address to "1100" end vector vector Address_1101 initialize to Disable set Address to "1101" end vector vector Address_1110 initialize to Disable set Address to "1110" end vector vector Address_1111 initialize to Disable set Address to "1111" end vector vector Data_write_0000 initialize to Chip_select set Data_in to "0000" end vector vector Data_write_0001 initialize to Chip_select set Data_in to "0001" end vector vector Data_write_0010 initialize to Chip_select set Data_in to "0010" end vector vector Data_write_0011 initialize to Chip_select set Data_in to "0011" end vector vector Data_write_0100 initialize to Chip_select set Data_in to "0100" end vector vector Data_write_0101 initialize to Chip_select set Data_in to "0101" end vector vector Data_write_0110 initialize to Chip_select set Data_in to "0110" end vector vector Data_write_0111 initialize to Chip_select set Data_in to "0111" end vector vector Data_write_1000 initialize to Chip_select set Data_in to "1000" end vector vector Data_write_1001 initialize to Chip_select set Data_in to "1001" end vector vector Data_write_1010 initialize to Chip_select set Data_in to "1010" end vector vector Data_write_1011 initialize to Chip_select set Data_in to "1011" end vector vector Data_write_1100 initialize to Chip_select set Data_in to "1100" end vector vector Data_write_1101 initialize to Chip_select set Data_in to "1101" end vector vector Data_write_1110 initialize to Chip_select set Data_in to "1110" end vector vector Data_write_1111 initialize to Chip_select set Data_in to "1111" end vector vector Data_read_0000 initialize to Chip_select set Data_out to "0000" end vector vector Data_read_0001 initialize to Chip_select set Data_out to "0001" end vector vector Data_read_0010 initialize to Chip_select set Data_out to "0010" end vector vector Data_read_0011 initialize to Chip_select set Data_out to "0011" end vector vector Data_read_0100 initialize to Chip_select set Data_out to "0100" end vector vector Data_read_0101 initialize to Chip_select set Data_out to "0101" end vector vector Data_read_0110 initialize to Chip_select set Data_out to "0110" end vector vector Data_read_0111 initialize to Chip_select set Data_out to "0111" end vector vector Data_read_1000 initialize to Chip_select set Data_out to "1000" end vector vector Data_read_1001 initialize to Chip_select set Data_out to "1001" end vector vector Data_read_1010 initialize to Chip_select set Data_out to "1010" end vector vector Data_read_1011 initialize to Chip_select set Data_out to "1011" end vector vector Data_read_1100 initialize to Chip_select set Data_out to "1100" end vector vector Data_read_1101 initialize to Chip_select set Data_out to "1101" end vector vector Data_read_1110 initialize to Chip_select set Data_out to "1110" end vector vector Data_read_1111 initialize to Chip_select set Data_out to "1111" end vector !AT The following vectors have been added for a minimum pins test. Any !AT vectors that references the data bus was copied and modified to reference !AT only a single pin of the data bus. vector WEb_lo_D0 set Address to "kkkk" set Data_in_D0 to "k" set Chip_select_bar to "0" set Write_enable_bar to "0" end vector vector WEb_lo_D1 set Address to "kkkk" set Data_in_D1 to "k" set Chip_select_bar to "0" set Write_enable_bar to "0" end vector vector WEb_lo_D2 set Address to "kkkk" set Data_in_D2 to "k" set Chip_select_bar to "0" set Write_enable_bar to "0" end vector vector WEb_lo_D3 set Address to "kkkk" set Data_in_D3 to "k" set Chip_select_bar to "0" set Write_enable_bar to "0" end vector vector WEb_hi_D0 set Address to "kkkk" set Data_in_D0 to "k" set Chip_select_bar to "0" set Write_enable_bar to "1" end vector vector WEb_hi_D1 set Address to "kkkk" set Data_in_D1 to "k" set Chip_select_bar to "0" set Write_enable_bar to "1" end vector vector WEb_hi_D2 set Address to "kkkk" set Data_in_D2 to "k" set Chip_select_bar to "0" set Write_enable_bar to "1" end vector vector WEb_hi_D3 set Address to "kkkk" set Data_in_D3 to "k" set Chip_select_bar to "0" set Write_enable_bar to "1" end vector vector Data_write_D0_0 initialize to Chip_select set Data_in_D0 to "0" end vector vector Data_write_D0_1 initialize to Chip_select set Data_in_D0 to "1" end vector vector Data_write_D1_0 initialize to Chip_select set Data_in_D1 to "0" end vector vector Data_write_D1_1 initialize to Chip_select set Data_in_D1 to "1" end vector vector Data_write_D2_0 initialize to Chip_select set Data_in_D2 to "0" end vector vector Data_write_D2_1 initialize to Chip_select set Data_in_D2 to "1" end vector vector Data_write_D3_0 initialize to Chip_select set Data_in_D3 to "0" end vector vector Data_write_D3_1 initialize to Chip_select set Data_in_D3 to "1" end vector vector Data_read_D0_0 initialize to Chip_select set Data_out_D0 to "0" end vector vector Data_read_D0_1 initialize to Chip_select set Data_out_D0 to "1" end vector vector Data_read_D1_0 initialize to Chip_select set Data_out_D1 to "0" end vector vector Data_read_D1_1 initialize to Chip_select set Data_out_D1 to "1" end vector vector Data_read_D2_0 initialize to Chip_select set Data_out_D2 to "0" end vector vector Data_read_D2_1 initialize to Chip_select set Data_out_D2 to "1" end vector vector Data_read_D3_0 initialize to Chip_select set Data_out_D3 to "0" end vector vector Data_read_D3_1 initialize to Chip_select set Data_out_D3 to "1" end vector !*************************************************************** !*************************************************************** sub Write_data (Address, Data) execute Address execute Data execute Write_enable_low execute Write_enable_high end sub sub Read_data (Address, Data) execute Address execute Data end sub !AT The following subroutines have been added for a minimum pins test. !AT Vectors in the subroutine "Write_data" reference the entire data bus. !AT Therefore this subroutine was copied and modified to reference only !AT a single pin of the data bus. The subroutine "Read_data" did not !AT require any modification as all references to the data bus are made !AT via a passed parameter (Data). This reference can be modified in the !AT call statement. sub Write_data_Dx (Address, Data_Dx, WEb_lo_Dx, WEb_hi_Dx) execute Address execute Data_Dx execute WEb_lo_Dx execute WEb_hi_Dx end sub !*************************************************************** !AT The following AwareTest units have been added for minimum pins tests. Each !AT unit tests a separate data pin starting with D0. unit "awaretest D0 Test" call Write_data_Dx (Address_0000, Data_write_D0_0, WEb_lo_D0, WEb_hi_D0) call Read_data (Address_0000, Data_read_D0_0) call Write_data_Dx (Address_0000, Data_write_D0_1, WEb_lo_D0, WEb_hi_D0) call Read_data (Address_0000, Data_read_D0_1) end unit unit "awaretest D1 Test" call Write_data_Dx (Address_0000, Data_write_D1_0, WEb_lo_D1, WEb_hi_D1) call Read_data (Address_0000, Data_read_D1_0) call Write_data_Dx (Address_0000, Data_write_D1_1, WEb_lo_D1, WEb_hi_D1) call Read_data (Address_0000, Data_read_D1_1) end unit unit "awaretest D2 Test" call Write_data_Dx (Address_0000, Data_write_D2_0, WEb_lo_D2, WEb_hi_D2) call Read_data (Address_0000, Data_read_D2_0) call Write_data_Dx (Address_0000, Data_write_D2_1, WEb_lo_D2, WEb_hi_D2) call Read_data (Address_0000, Data_read_D2_1) end unit unit "awaretest D3 Test" call Write_data_Dx (Address_0000, Data_write_D3_0, WEb_lo_D3, WEb_hi_D3) call Read_data (Address_0000, Data_read_D3_0) call Write_data_Dx (Address_0000, Data_write_D3_1, WEb_lo_D3, WEb_hi_D3) call Read_data (Address_0000, Data_read_D3_1) end unit unit "RAM test" call Write_data (Address_0000, Data_write_0000) call Write_data (Address_0001, Data_write_0001) call Write_data (Address_0011, Data_write_0011) call Write_data (Address_0010, Data_write_0010) call Write_data (Address_0110, Data_write_0110) call Write_data (Address_0111, Data_write_0111) call Write_data (Address_0101, Data_write_0101) call Write_data (Address_0100, Data_write_0100) call Write_data (Address_1100, Data_write_1100) call Write_data (Address_1101, Data_write_1101) call Write_data (Address_1111, Data_write_1111) call Write_data (Address_1110, Data_write_1110) call Write_data (Address_1010, Data_write_1010) call Write_data (Address_1011, Data_write_1011) call Write_data (Address_1001, Data_write_1001) call Write_data (Address_1000, Data_write_1000) call Read_data (Address_0000, Data_read_0000) call Read_data (Address_0001, Data_read_0001) call Read_data (Address_0011, Data_read_0011) call Read_data (Address_0010, Data_read_0010) call Read_data (Address_0110, Data_read_0110) call Read_data (Address_0111, Data_read_0111) call Read_data (Address_0101, Data_read_0101) call Read_data (Address_0100, Data_read_0100) call Read_data (Address_1100, Data_read_1100) call Read_data (Address_1101, Data_read_1101) call Read_data (Address_1111, Data_read_1111) call Read_data (Address_1110, Data_read_1110) call Read_data (Address_1010, Data_read_1010) call Read_data (Address_1011, Data_read_1011) call Read_data (Address_1001, Data_read_1001) call Read_data (Address_1000, Data_read_1000) call Write_data (Address_0000, Data_write_1111) call Write_data (Address_0001, Data_write_1110) call Write_data (Address_0011, Data_write_1100) call Write_data (Address_0010, Data_write_1101) call Write_data (Address_0110, Data_write_1001) call Write_data (Address_0111, Data_write_1000) call Write_data (Address_0101, Data_write_1010) call Write_data (Address_0100, Data_write_1011) call Write_data (Address_1100, Data_write_0011) call Write_data (Address_1101, Data_write_0010) call Write_data (Address_1111, Data_write_0000) call Write_data (Address_1110, Data_write_0001) call Write_data (Address_1010, Data_write_0101) call Write_data (Address_1011, Data_write_0100) call Write_data (Address_1001, Data_write_0110) call Write_data (Address_1000, Data_write_0111) call Read_data (Address_0000, Data_read_1111) call Read_data (Address_0001, Data_read_1110) call Read_data (Address_0011, Data_read_1100) call Read_data (Address_0010, Data_read_1101) call Read_data (Address_0110, Data_read_1001) call Read_data (Address_0111, Data_read_1000) call Read_data (Address_0101, Data_read_1010) call Read_data (Address_0100, Data_read_1011) call Read_data (Address_1100, Data_read_0011) call Read_data (Address_1101, Data_read_0010) call Read_data (Address_1111, Data_read_0000) call Read_data (Address_1110, Data_read_0001) call Read_data (Address_1010, Data_read_0101) call Read_data (Address_1011, Data_read_0100) call Read_data (Address_1001, Data_read_0110) call Read_data (Address_1000, Data_read_0111) end unit ! End of test