Time Sync Analyzer — TimeSync

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Introduction

 

Timing and Synchronization has become essential to a variety of networks and industries. With the introduction of Ethernet-based fronthaul into the 5G Radio Access Network (RAN), the demand for synchronizing devices across RAN has become more stringent. ITU-T has enhanced G.827x recommendations and defined new Class-C and Class-D telecom grade clock. Many RAN devices now need to support Ethernet-based synchronization technologies with enhanced accuracy. It is critical to test the interoperability and to benchmark synchronization performance of RAN devices and the networks to ensure a robust Ethernet synchronization infrastructure for the successful 5G services delivery.

 

Keysight’s Time Sync Analyzer (TSA) is a clock quality analytics platform, targeting 5G O-RAN, xHaul transport, as well as Data Center networks. Equally at home in the R&D lab as it is performing standardized qualifications, TSA tests synchronization performance of devices and networks, allowing users to analyze an array of digital clocks, packet clocks, and Ethernet PHY clocks. It is designed to address stringent synchronization demand, to enhance the test methodology with realistic network load, to monitor concurrently multiple network paths, and to increase the productivity with parallel test executions.

 

Platform Overview 

 

Time Sync Analyzer is available as a factory-assembled appliance with flexible configuration options. It includes a Timing card and up to three Ethernet line cards. 

 

The timing card includes standard 10MHz and 1 PPS reference clock input/output for system operation, driving external devices, and taking test input for measurement. It also provides integrated GNSS receiver, ITU-T standard ToD+ port, and optional Rubidium standard. 

 

The Ethernet line card supports two multi-rate-capable Ethernet ports per line card, and multiple digital clock interface ports for associated signal analytics. Each Ethernet port can act as Precision Time Protocol (PTP) TimeTransmitter and TimeReceiver, generate SyncE clock, add clock impairment, and measure clock quality. Data traffic can be injected together with the PTP flows to assess the synchronization performance under realistic network load.

 

Time Sync Analyzer is driven by a convenient and intuitive Web-based UI, along with a comprehensive Python/REST automation interface. It offers a scalable multi-user architecture with minimum per Ethernet line card ownership, allowing up to 3 test users to share the system for parallel test execution. 

 

Highlights 

 

• High-density and high-performance clock quality analytic tool

• Analyzes an array of digital clocks, packet clocks, and Ethernet PHY clocks 

• Emulates PTP and SyncE clocks with build-in impairment for realistic testing

• Measures clock quality per ITU-T recommendations and O-RAN specifications

• Analyzes multiple clock paths in parallel across devices and networks

• Flexible reference clock input/output options fit various lab timing infrastructure and fronthaul timing topologies 

• Exercises and tests hybrid multi-drop networks from a single appliance

• Scalable multi-user architecture for sharing and parallel test execution

• Intuitive web-based user interface for system operation

• Comprehensive Python/REST test automation and easy-to-use

 

Key features

 

• Emulates PTP TimeTransmitter and TimeReceiver, supporting ITU-T G.8275.1/G.8275.2 and IEEE 1588v2-2008

• Emulates SyncE and ESMC with QL TLV and enhanced QL TLV per ITU-T G.8264

• Dynamic update of PTP clock class and ESMC quality level

• Generates PTP Time Error impairment and SyncE wander with customizable noise table 

• Supports flexible wander generation for Ethernet PHY clock and FlexIO digital clock

• Analyzes clock quality for PTP, SyncE, 1PPS, 10MHz per ITU-T Recommendations

• Supports parallel PTP, SyncE and digital clock measurements

• Performs live measurement or with an offline data set

• Programmable digital low pass filter and high pass filter

• Built-in standard-based mask and user-defined mask 

• 2 Ethernet interfaces per Line Card supporting 10/25/100GE

• Line rate bi-directional capture on each port with 1ns timestamp resolution

• Reference 10 MHz and 1 PPS Phase input and output

• Integrated GNSS receiver, ITU-T G.8271/G.703 ToD+ input port, and Rubidium option 

• Convenient web-based user interface for clock quality test and system timing source configuration

• Multiple user support (up to three test sessions, one per Ethernet line card)

• Python/REST API support for automation